Digital Logic Circuits Trainer

Category: Electrical Lab

Description
Reviews (0)

Brand: CL

Model: TC-SAD

Pictures are for reference only.

1. System Introduction

With the development of electronic science and technology, especially microelectronics technology, the experimental content of digital logic circuits has been continuously updated. In addition to using conventional TTL logic devices (such as logic gates, triggers and other small-scale integrated circuits) for experiments, programmable logic devices (including PLA, GAL, CPLD, FPGA and other large-scale integrated circuits) can also be used to design and simulate digital circuits with the help of computer-aided design software. This hardware-softened experimental method has the advantages of easy design, easy modification and easy implementation, which can effectively improve the experimental efficiency. It is gradually replacing the previous pure hardware logic experimental method and becoming an important content of digital logic circuit experiments.

The experimental instrument integrates the teaching experimental experience of digital logic circuits in many colleges and universities, scientifically configures experimental projects, and can complete conventional digital circuit experiments and experiments using large-scale logic devices (CPLD/FPGA) for digital logic design to replace the complex traditional TTL/COMS hardware design. It encourages students to combine theory with practice, cultivate students’ basic skills in analyzing, designing, assembling and debugging digital circuits, master digital logic circuit experimental methods, and lay a solid foundation for mastering subsequent professional disciplines.

Set Description:Digital logic Circuit Unit-01 Nos
FPGA Digital Circuit Design Unit-01 Nos
Digital Logic Circuit Unit Technical Specifications:
Feature:
Logic value is displayed “1” or “0” on FND display.
Loaded pulse generator and logic input switch.

Technical Specification:
2 input and gate: Min. 10 Nos
4 input and gate: Min. 10 Nos
2 input or gate: Min. 5 Nos
4 input or gate: Min. 2 Nos
5 input or gate: Min. l Nos
NOT gate: Min. 6 Nos
2 input Nand gate: Min. 6 Nos
2 input or gate: Min. 2 Nos
2 input ex-or gate: Min. 2 Nos
R-S flip-flop: Min. 2 Nos
J-K fip-Aop: Min, 4 Nos
1 bit shift register: Min. 4 Nos
LED “1”,”0″ indicator: Min. 10 Nos
Level setting switch: Min. 10 Nos
Clock:10/1000Hz
One short pulse: Min. 1 Nos
Manual pulse generator: Min. l NosFront panel: FR-4 (1.6t)
Rear panel: Printed circuit board

Accessories: User’s manual: 1 Nos, Power cord: 1 Nos, Test wire (0.8 to 1): 1 set,

Spare fuse: 2 Nos

Experiment contents:

AND circuit, OR circuit, NOR circuit, NAND circuit, NOR circuit, X-OR circuit, ADDER circuit, Encoder, Decoder, R/S flip-flop circuit, J/K flip-flop circuit, Asynchronous binary the 10th coefficient circuit by J/K flір-Пор, Experiment of 4-bit serial input serial output shift registers that use NOT circuit, Experiment of R-S flip-flop by NAND circuit and NOT circuit, Pulse shaping circuit by NAND circuit and NOT circuit, Unlimited multi-vibrator that use NOT circuit, Asynchronous binary the third, seventh and ninth coefficient circuit.

FPGA Digital Circuit Design Trainer Technical Details:

Features:

Considering the flexibility and scalability of FPGA devices, ALTERA and XILINX

devices have been modularized to allow for replacement.

It should be configured to provide 1MHz, 1kHz, 1Hz and User Clock (7.3928MHz)

clock through fixed clock pins.

Bread Board should allow user to experiment with logic circuits and send and receive

signals to and from the FPGA through the 1/O pins.

The items should have the following configurations:

Power Block; Text LCD; FPGA Module; SRAM (On the back)

JTAG Port; RS232 Port; USB to Serial Port; PS/2 Port

Bread Board; RESET Switch; PIEZO; USER Clock; Button Switch;

• BUS Switch

• 7-Segment; LED

Hardware Specifications:

FPGA: ALTERA:

FPGA: Cyclone II Series; User I/O: 138; PROM: EPCS4

Clock: IMHz, 1kHz, 1Hz, USER Clock (7.3928MHz)

SRAM: 4Mbit High Speed Static RAM 2EA

LED: Min. 5mm High brightness LED 16EA

Button Switch: User Push-button 16EA

Reset Switch: User Push-button 1EA (Low Active)

Dip Switch: User 8-bit DIP Switch 1EA

Piezo: 5V Input Piezo IEA

FND: Cathode Common: 1-digit 1EA, 4-digit 1EA

Character LCD: Min. 16 x 2 Display

UART: RS232 UART Port IEA (FPGA I/O)

USB to Serial: USB to Serial Interface 1EA

PS/2: Total PS/2 Keyboard or PS/2 Mouse port IEA

Bread Board:

Terminal Strip x 2, Bus Strip x 2

Size: Min. 117 x 91 mm

I/O: +5V, GND, 18pin FPGA Interface I/O

Accessory:

DC +5V/1.5A Adopt; USB cable IEA; AC Power Cable

USB Cable (A to B Type); USB Download Cable; User Manual and CD

Board Size:

Base: Min. 240 x 180 (mm)

FPGA: Min. 66 x 66 (mm)

Product dimensions may vary, please refer to the actual product.

Warranty: 1 (One) year with services

Reviews

There are no reviews yet.

Sign up for Newsletter

Digital Logic Circuits Trainer

Reviews

Be the first to review “Digital Logic Circuits Trainer” Cancel reply

Sign up for Newsletter

Digital Logic Circuits Trainer

Reviews

Be the first to review “Digital Logic Circuits Trainer” Cancel reply

Related products

Login